A Simulation Framework for Memristor-Based Heterogeneous Computing Architectures

Memristor-based accelerator (MBA) has demonstrated its capability in accelerating matrix-vector multiplication (MVM) with high performance and energy efficiency. However, it is hard to determine whether how well an application can benefit from MBAs a heterogeneous computing architecture. In this article, we propose simulation framework called MHSim evaluate the efficiency of applications running both CPUs. provides flexible system-level interfaces circuit-level models for designers configure architectures. We design general-purpose MBA which enables floating-point computation general matrix-matrix (GEMM). Our quantify different architectures various applications. validate our SPICE accuracy via several case studies. Experimental results demonstrate that deviations consumption latency are only 0.47% 0.49% on average compared SPICE-based simulation.